Recently, the research group of Cheng Lin, a professor at the National Demonstrative School of Microelectronics of the University of Science and Technology of China, has achieved important results in the field of fully integrated isolated power chip design. This research proposes a fully integrated isolated power chip based on glass fan-out wafer-level packaging (FOWLP). The proposed architecture realizes the winding of high-performance micro-transformers by using three rewiring layers (RDL) on a single glass substrate, and completes the interconnection with the transmitting and receiving chips, which effectively improves the chip conversion efficiency and power density , Provide new solutions for the design of isolated power chips in the future. On February 18, related research results were published under the title A 1.25W 46.5%-Peak-Efficiency Transformer-in-Package Isolated DC-DC Converter Using Glass-Based Fan-Out Wafer-Level Packaging Achieving 50mW/mm2 Power Density At the IEEE International Solid-State Circuits Conference (ISSCC), the highest-level conference in the field of integrated circuit design, the results were selected for demo demonstration at the conference.
The isolated power chip plays an important role in ensuring the safety and reliability of the system in harsh industrial environments. In recent years, in some size- and cost-constrained applications, how to efficiently transmit hundreds of milliwatts of power between two isolated grounds is the main challenge currently facing, and has attracted great attention from academia and industry. Compared with traditional isolated power chips, this research uses advanced glass fan-out wafer-level packaging technology to interconnect the receiving and transmitting chips through a miniature transformer made of a rewiring layer on the package, without the need for additional transformer chips. It overcomes the shortcomings of three or even four chips in the existing chip design, thereby improving the conversion efficiency and power density of the isolated power supply. In addition, the research also proposes a power tube grid voltage control technology that uses variable capacitors to achieve a wider power supply voltage range and control the peak voltage of the grid to keep it in the best safe voltage range. There is no need to use a power tube with a special thick gate oxide process to achieve higher efficiency and lower costs. The test results show that the isolated power chip achieves a peak conversion efficiency of 46.5% and a maximum output power of 1.25W, and the final package size is only 5mm×5mm. The efficiency and power in the currently reported non-magnetic core isolated power chip The density is the highest.
Pan Dongfang, a postdoctoral fellow from the School of Microelectronics of the University of Science and Technology of China, is the first author of the paper, and Cheng Lin is the corresponding author of the paper. This is the first time that the University of Science and Technology of China has published a paper on ISSCC as the first author. The research work was funded by the National Natural Science Foundation of China, the Ministry of Science and Technology, and the Chinese Academy of Sciences.
Figure 1. The fully integrated isolated power chip solution proposed in the paper
Figure 2. Photo of isolated power system package and chip
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